Manish Jain
Manish Jain
Teaching Professor, Creative LearningDirector RnD, Synopsys Scientist
- BTech: IIT Kanpur, 1993
Email: manish.jain -AT- iitgn.ac.in
Office:
6/346
VOIP:
2240
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Selected Publications
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System and method for enhancing the speed of dynamic timing simulation using delay assessment at compile time. Patent number: 7047175.
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Enhancing speed of simulation of an IC design while testing scan circuitry. Patent number: 7925940.
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Executing a hardware simulation and verification solution. Patent number: 8782580.
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Method and apparatus for executing a hardware simulation and verification solution. Patent number: 8341570.
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Method and apparatus for executing a hardware simulation and verification solution. Patent number: 812182.
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Work Experience
- Teaching Professor, Center for Creative Learning, IIT Gandhinagar (Nov 2018 to present)
- Principal Coordinator, Center for Creative Learning, IIT Gandhinagar (2017 to present)
- Senior Consultant, Science Center IUCAA Pune, MVS. (2013 to 2016)
- Synopsys, Bangalore (2005-2013)
- Synopsys, Mountain View California (1996 to 2013)